Self-improvement of cell stability in SRAM by post fabrication technique
暂无分享,去创建一个
The post fabrication technique for self-improvement of SRAM cell stability is validated by experiment using 1k DMA SRAM TEG array. It is shown that the stability of unbalance cells is automatically improved by merely applying stress voltage to VDD terminal. The mechanism of the phenomena is also analyzed by measuring VTH of all transistors before and after stress and it is newly found that |VTH| of weaker PFET in the cell is selectively lowered by the self-improve mechanism.
[1] S. Miyano,et al. Direct measurements, analysis, and post-fabrication improvement of noise margins in SRAM cells utilizing DMA SRAM TEG , 2010, 2010 Symposium on VLSI Technology.
[2] K. Takeuchi,et al. Direct Measurement of Correlation Between SRAM Noise Margin and Individual Cell Transistor Variability by Using Device Matrix Array , 2011, IEEE Transactions on Electron Devices.