Integration issues of a photonic layer on top of a CMOS circuit

Photonics on CMOS is the integration of CMOS technology and optics components to enable either improved functionality of the electronic circuit (e.g. optical clock distribution) or as a means to miniaturize optical functions (e.g. miniaturised transceiver). The Near Infra Red (NIR) wavelength range (1.3 or 1.55μm) was chosen for this to minimise the impact the light on the behaviour of the microelectronic components. The integration of a photonic layer on a CMOS circuit can be seen in different ways: A combined fabrication at the front end level, the wafer bonding of an SOI photonic circuit at the back-end level, or the insertion of an embedded photonic layer between metallization schemes. For combined fabrication, a silicon on insulator rib technology has been developed with low (0.4dB/cm) propagation loss, ultra-high speed Ge-on-Si photodetector and SiGe/Si modulators.. In the metal-semiconductor-metal (MSM) configuration, bandwith of 35 GHz at 1.3 μm and 1.55μm has been measured. In the second approach, a wafer bonding of silicon rib and stripe technologies was achieved above the metallization layers of a CMOS wafer. For the third method, direct fabrication of a photonic layer at the back-end level was achieved using low temperature processes. Waveguide technologies such as SiNx (loss 2dB/cm) or amorphous silicon (loss 5dB/cm) were developed and were followed by the molecular bonding of InP die, these were needed to create the optoelectronic components (sources and detectors). Using an InP microdisk, 50% coupling was achieved to a stripe silicon waveguide.