ParSPIKE-a parallel DSP-accelerator for dynamic simulation of large spiking neural networks

The fast simulation of large networks of spiking neurons is a major task for the examination of biology inspired vision systems. Networks of this type are labelling features by synchronization of spikes and there is strong demand to simulate those effects in a real world environment. Because of the quite complex calculations for one model neuron the simulation of thousands or millions of these neurons is not efficient on existing hardware platforms. In order to simulate closer to the real time requirement, it is necessary to implement a dedicated hardware. Our aim is a hardware system mainly consisting of standard components which is as flexible as possible concerning the model neuron but as specialized as necessary to meet our performance requirements. Thus we decided to implement a parallel system with Digital Signal Processors (DSP) offering a large on-chip-memory. One main task of this work is the optimization of the simulation algorithm for the neurons distributed to the DSP which means the sequential part of simulation. This optimization benefits from the fact that there is only a very low percentage of simultaneously active neurons in vision networks. For communication between the nodes only spikes are distributed via a spike switching network. Processing of the network topology is realized by two different concepts. One idea is to compute the synapses autonomously on the processing node by representing a regular connection scheme with one connection mask for many neurons. Additional connections requiring adaptability and irregular connection schemes are stored in a shared memory. To avoid a bottleneck a synapse caching is used within each processing node. This paper describes the architecture of a DSP accelerator and shows the advantages with simulation results from a typical large vision network.

[1]  T. Schoenauer,et al.  MASPINN: novel concepts for a neuroaccelerator for spiking neural networks , 1999, Other Conferences.

[2]  Reinhard Eckhorn,et al.  Feature Linking via Synchronization among Distributed Assemblies: Simulations of Results from Cat Visual Cortex , 1990, Neural Computation.

[3]  Ralf Diekmann,et al.  PARTY - A Software Library for Graph Partitioning , 1997 .

[4]  Heinrich Klar,et al.  A SIMD/dataflow architecture for a neurocomputer for spike-processing neural networks (NESPINN) , 1996, Proceedings of Fifth International Conference on Microelectronics for Neural Networks.

[5]  Heinrich Klar,et al.  Hardware Requirements for Spike-Processing Neural Networks , 1995, IWANN.

[6]  A S French,et al.  A flexible neural analog using integrated circuits. , 1970, IEEE transactions on bio-medical engineering.

[7]  Georg Hartmann Motion induced transformations of spatial representations: Mapping 3d information onto 2d , 1992, Neural Networks.

[8]  G. Hartmann,et al.  An artificial neural network accelerator for pulse coded model-neurons , 1995, Proceedings of ICNN'95 - International Conference on Neural Networks.

[9]  Ernst Niebur,et al.  Efficient Simulation of Biological Neural Networks on Massively Parallel Supercomputers with Hypercube Architecture , 1993, NIPS.

[10]  Tim Schönauer,et al.  Simulation of Spiking Neural Networks on Different Hardware Platforms , 1997, ICANN.

[11]  C. Spengler,et al.  Contour Segmentation with Recurrent Neural Networks of Pulse-Coding Neurons , 1997, CAIP.

[12]  Manfred Paul,et al.  Parallel Simulation of Pulse Coded Neural Networks , 1997 .

[13]  W. Singer,et al.  Stimulus-specific neuronal oscillations in orientation columns of cat visual cortex. , 1989, Proceedings of the National Academy of Sciences of the United States of America.

[14]  P. Dicke,et al.  Feature linking via stimulus-evoked oscillations: experimental results from cat visual cortex and functional implications from a network model , 1989, International 1989 Joint Conference on Neural Networks.