CHORD: a modular semiconductor device simulation development tool incorporating external network models
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[1] A. G. Chynoweth,et al. Ionization Rates for Electrons and Holes in Silicon , 1958 .
[2] H. Gummel,et al. Large-signal analysis of a silicon Read diode oscillator , 1969 .
[3] R. V. Overstraeten,et al. Measurement of the ionization rates in diffused silicon p-n junctions , 1970 .
[4] M. Powell,et al. On the Estimation of Sparse Jacobian Matrices , 1974 .
[5] Albert E. Ruehli,et al. The modified nodal approach to network analysis , 1975 .
[6] Savvas G. Chamberlain,et al. Computer model and charge transport studies in short gate charge-coupled devices , 1977 .
[7] D. Rose,et al. Parameter Selection for Newton-Like Methods Applicable to Nonlinear Partial Differential Equations , 1980 .
[8] S.G. Chamberlain,et al. Modeling and experimental simulation of the low-frequency transfer inefficiency in bucket-brigade devices , 1980, IEEE Transactions on Electron Devices.
[9] Siegfried Selberherr,et al. MINIMOS—A two-dimensional MOS transistor analyzer , 1980 .
[10] Danny Cohen. On Holy Wars and a Plea for Peace , 1981, Computer.
[11] D. Rose,et al. Global approximate Newton methods , 1981 .
[12] E. M. Buturla,et al. Finite-element analysis of semiconductor devices: the FIELDAY program , 1981 .
[13] S. G. Chamberlain,et al. Three-dimensional simulation of VLSI MOSFET's: The three-dimensional simulation program WATMOS , 1982 .
[14] J. Pasciak,et al. Computer solution of large sparse positive definite systems , 1982 .
[15] P.K. Chatterjee,et al. An Investigation of the Charge Conservation Problem for MOSFET Circuit Simulation , 1983, IEEE Journal of Solid-State Circuits.
[16] M.J. Hargrove,et al. Numerical solution of the semiconductor transport equations with current boundary conditions , 1983, IEEE Transactions on Electron Devices.
[17] W.L. Engl,et al. Device modeling , 1983, Proceedings of the IEEE.
[18] S. G. Chamberlain,et al. Nonuniform displacement of MOSFET channel pinchoff , 1984 .
[19] Chenming Hu,et al. A compact IGFET charge model , 1984 .
[20] R.H. Dennard,et al. Characterization and modeling of a latchup-free 1-µm CMOS technology , 1984, 1984 International Electron Devices Meeting.
[21] Iterative methods in semiconductor device simulation , 1985, IEEE Transactions on Electron Devices.
[22] L.M. Terman,et al. A self-aligned 1-µm-channel CMOS technology with retrograde n-well and thin epitaxy , 1985, IEEE Transactions on Electron Devices.
[23] S.G. Chamberlain,et al. Drain-induced barrier-lowering analysis in VSLI MOSFET devices using two-dimensional numerical simulations , 1986, IEEE Transactions on Electron Devices.
[24] Robert W. Dutton,et al. An Extension to Newton's Method in Device Simulators--On An Efficient Algorithm to Evaluate Small-Signal Parameters and to Predict Initial Guess , 1987, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[25] T. Nishida,et al. A physically based mobility model for MOSFET numerical simulation , 1987, IEEE Transactions on Electron Devices.
[26] John Choma,et al. Mixed-mode PISCES-SPICE coupled circuit and device solver , 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[27] Christian H. Corbex,et al. Data structuring for process and device simulations , 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[28] James Gettys,et al. The X window system , 1990 .