论文信息 - An ultra low phase noise GSM local oscillator in a 0.09 /spl mu/m standard digital CMOS process with no high-Q inductors

An ultra low phase noise GSM local oscillator in a 0.09 /spl mu/m standard digital CMOS process with no high-Q inductors

A design approach is presented for realizing a fully integrated local oscillator, covering all 4 GSM bands, and fulfilling the stringent phase noise requirement of -162 dBc/Hz at a 20-MHz offset from a 915-MHz carrier in a 1.4-V 0.09-/spl mu/m digital CMOS process. By operating a digitally-controlled oscillator at a 4/spl times/ frequency followed by /spl divide/ 4 frequency dividers, the requirements of on-chip inductor Q and the amount of gate oxide stress are relaxed. Both dynamic and SCL dividers are also studied for their phase noise performance. It was found that a dynamic divider is needed for stringent TX outputs while an SCL divider can be used for RX to save power. Both dividers are capable of producing a tight relation between 4 quadrature output phases at low voltage and low power.

Chih-Ming Hung | N. Barton | Meng-Chang Lee | D. Leipold

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