Verification of the Sparrow processor

We present a new gate-level hardware verification method based on term rewriting systems. As an application, we formally verify the Sparrow microprocessor with the term rewriting theorem prover ReDuX. Our designs are given as net-lists in BLIF format. We mechanically compile the net-lists into the formal axiomatization of Sparrow as a term rewriting system. ReDuX can then emulate Sparrow symbolically. We manually produce verification conditions from the user-level processor specification and verify each one of them. Our axiomatization corresponds directly to net-lists, and thus is intuitive and close to the hardware. Except for simple equations no higher concept of logic is involved.

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