Methodology for FPGA Implementation of a Chaos-Based AWGN Generator

Additive White Gaussian Noise (AWGN) generators are a basic tool for the test and measurement of digital systems. One drawback for hardware implementation of the classically used algorithms is that they require the hardware implementation of complex operations (such as sinusoidal and logarithmic functions). In this chapter, a method for the design and hardware implementation of an AWGN generator based on chaotic maps is described. The advantage is that deterministic chaotic systems are described by simple nonlinear equations, and therefore, they are straightforward to implement in hardware. To ensure that the generated sequence has the desired Probability Density Function (PDF), the chaotic map, which is the heart of the system, is synthesized using an approach based on the theory of positive matrices method. The hardware implementation was developed using an Altera Cyclone III FPGA with the 3C120 Development Board. Luciana De Micco National University of Mar del Plata, Argentina Hilda Angela Larrondo National University of Mar del Plata, Argentina Methodology for FPGA Implementation of a Chaos-Based AWGN Generator

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