GHEVC: An Efficient HEVC Decoder for Graphics Processing Units
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[1] Anantha Chandrakasan,et al. A 249-Mpixel/s HEVC Video-Decoder Chip for 4K Ultra-HD Applications , 2014, IEEE Journal of Solid-State Circuits.
[2] Bin Luo,et al. A novel parallel deblocking filtering strategy for HEVC/H.265 based on GPU , 2016, Concurr. Comput. Pract. Exp..
[3] Gary J. Sullivan,et al. Comparison of the Coding Efficiency of Video Coding Standards—Including High Efficiency Video Coding (HEVC) , 2012, IEEE Transactions on Circuits and Systems for Video Technology.
[4] Nuno Roma,et al. GPU-assisted HEVC intra decoder , 2015, Journal of Real-Time Image Processing.
[5] Benno Stabernack,et al. FPGA implementation of a full HD real-time HEVC main profile decoder , 2014, IEEE Transactions on Consumer Electronics.
[6] David Flynn,et al. HEVC Complexity and Implementation Analysis , 2012, IEEE Transactions on Circuits and Systems for Video Technology.
[7] Nuno Roma,et al. Cooperative CPU+GPU deblocking filter parallelization for high performance HEVC video codecs , 2014, 2014 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP).
[8] Chia-Yang Tsai,et al. Sample Adaptive Offset in the HEVC Standard , 2012, IEEE Transactions on Circuits and Systems for Video Technology.
[9] Chi-Cheng Ju,et al. Energy and area efficient hardware implementation of 4K Main-10 HEVC decoder in Ultra-HD Blu-ray player and TV systems , 2015, 2015 IEEE International Conference on Multimedia and Expo (ICME).
[10] Nuno Roma,et al. Dynamic Load Balancing for Real-Time Video Encoding on Heterogeneous CPU+GPU Systems , 2014, IEEE Transactions on Multimedia.
[11] Ben H. H. Juurlink,et al. SIMD Acceleration for HEVC Decoding , 2015, IEEE Transactions on Circuits and Systems for Video Technology.
[12] Kemal Ugur,et al. Intra Coding of the HEVC Standard , 2012, IEEE Transactions on Circuits and Systems for Video Technology.
[13] Jun Sun,et al. Novel Efficient HEVC Decoding Solution on General-Purpose Processors , 2014, IEEE Transactions on Multimedia.
[14] Satoshi Goto,et al. A high parallel way for processing IQ/IT part of HEVC decoder based on GPU , 2014, 2014 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS).
[15] F. Bossen,et al. Common test conditions and software reference configurations , 2010 .
[16] Eduardo Juárez,et al. A multicore DSP HEVC decoder using an actorbased dataflow model and OpenMP , 2015, IEEE Transactions on Consumer Electronics.
[17] Minhua Zhou,et al. HEVC Deblocking Filter , 2012, IEEE Transactions on Circuits and Systems for Video Technology.
[18] Ajith Pasqual,et al. 4K Real-Time HEVC Decoder on an FPGA , 2016, IEEE Transactions on Circuits and Systems for Video Technology.
[19] Nuno Roma,et al. GPU acceleration of the HEVC decoder inter prediction module , 2015, 2015 IEEE Global Conference on Signal and Information Processing (GlobalSIP).
[20] Jeong-Hoon Park,et al. Block Partitioning Structure in the HEVC Standard , 2012, IEEE Transactions on Circuits and Systems for Video Technology.
[21] Nuno Roma,et al. Opencl parallelization of the HEVC de-quantization and inverse transform for heterogeneous platforms , 2014, 2014 22nd European Signal Processing Conference (EUSIPCO).
[22] Nuno Roma,et al. Towards GPU HEVC intra decoding: Seizing fine-grain parallelism , 2015, 2015 IEEE International Conference on Multimedia and Expo (ICME).
[23] Bin Li,et al. HEVC Encoding Optimization Using Multicore CPUs and GPUs , 2015, IEEE Transactions on Circuits and Systems for Video Technology.
[24] Mohamed M. Fouad,et al. High throughput parallel scheme for HEVC deblocking filter , 2015, 2015 IEEE International Conference on Image Processing (ICIP).
[25] Gary J. Sullivan,et al. Overview of the High Efficiency Video Coding (HEVC) Standard , 2012, IEEE Transactions on Circuits and Systems for Video Technology.