A CMOS winner-takes-all circuit for self-organizing neural networks
暂无分享,去创建一个
[1] Yuping He,et al. A charge-based on-chip adaptation Kohonen neural network , 1993, IEEE Trans. Neural Networks.
[2] Igor M. Filanovsky,et al. CMOS Schmitt trigger design , 1994 .
[3] James L. McClelland,et al. Parallel distributed processing: explorations in the microstructure of cognition, vol. 1: foundations , 1986 .
[4] Andreas G. Andreou,et al. Current-mode subthreshold MOS circuits for analog VLSI neural systems , 1991, IEEE Trans. Neural Networks.
[5] David J. Allstot,et al. Current-feedthrough effects and cancellation techniques in switched-current circuits , 1990, IEEE International Symposium on Circuits and Systems.
[6] Edgar Sánchez-Sinencio,et al. A modular CMOS design of a Hamming network , 1992, IEEE Trans. Neural Networks.
[7] Janusz A. Starzyk,et al. CMOS current mode winner-take-all circuit with both excitatory and inhibitory feedback , 1993 .
[8] Edgar Sanchez-Sinencio,et al. Min-net winner-take-all CMOS implementation , 1993 .
[9] Jack L. Meador,et al. Competitive learning in asynchronous-pulse-density integrated circuits , 1992 .
[10] David Zipser,et al. Feature Discovery by Competive Learning , 1986, Cogn. Sci..
[11] Bing J. Sheu,et al. A high-precision VLSI winner-take-all circuit for self-organizing neural networks , 1993 .