Development of a Semi-Empirical Model for SEUs in Modern DRAMs

Abstract : Studies have found that the passage of a charged particle through a dynamic random access memory (DRAM) can cause a bit flip (1 to 0 or 0 to 1), also referred to as a single event upset (SEU). This is more noticeable in newer, denser computer systems which contain much more DRAM memory and, as a result, are more sensitive to radiation. SEUs are also more common at higher altitudes, where the neutron and proton fluxes were found to be as much as several hundred times greater than at sea level. For this reason, IBM, Boeing, the Department of Defense, and other government and commercial organizations have performed numerous studies on the phenomenon aimed at reducing the SEU effect in aircraft, missiles, and satellites which use DRAMs. Many of the previous models developed to characterize the SEU are not applicable to modern high-density chips. This project has developed a new and improved model which applied to the higher density chips and is based on particle energy, particle flux, and SEU cross-section data taken from a wide range of experiments. This study also identifies the nuclear reactions, chip characteristics, and particle environments which affect a DRAM's SEU rate. From this model, the soft error rates (SERs) of various commercial off-the-shelf (COTS) DRAMs were calculated at various altitudes, latitudes, and longitudes. These rates were used to identify which DRAMs were the most and least sensitive to radiation. Those DRAMs with lowest expected SEU rates will be more reliable in aircraft systems while those with the highest expected SEU rates can potentially be used in the development of a smaller lightweight neutron detection system.