A Web-Based Visualization and Animation Platform for Digital Logic Design

This paper presents a web-based education platform for the visualization and animation of the digital logic design process. This includes the design of combinatorial circuits using logic gates, multiplexers, decoders, and look-up-tables as well as the design of finite state machines. Various configurations of finite state machines can be selected to define the machine type, the state code, and the flip-flop type. Logic minimization with the K-map approach and the Quine McCluskey scheme is also supported. The tools, denoted as DLD-VISU, help students practice related topics in digital logic design courses. Also, instructors can use the tools to efficiently generate and verify examples for lecture notes or for homework problems and assignments. DLD-VISU was designed relying on a thorough investigation of related pedagogical aspects to define appropriate interactive graphical processes. The decision for a web-based solution, on the one hand, was motivated by making the tools available, portable, expandable, and at the same time transparent to the user. On the other hand, the advocated approach enables instructors to define access rules for their students to assure that students cannot use the tools to solve assessed homework problems or assignments before submission deadline. DLD-VISU supports self-assessment and reflects the student learning process using learning curves. The proposed platform was evaluated both in form of students' feedback as well as by analyzing the impact of using the tools on students' performance.

[1]  Rosilah Hassan,et al.  Flash notes and easy electronic software (EES): New technique to improve Digital Logic Design learning , 2011, Proceedings of the 2011 International Conference on Electrical Engineering and Informatics.

[2]  Yi Zhu,et al.  Enhancing Learning Effectiveness in Digital Design Courses Through the Use of Programmable Logic Boards , 2009, IEEE Transactions on Education.

[3]  Vladimir Pavlovic,et al.  SDLDS—System for Digital Logic Design and Simulation , 2013, IEEE Transactions on Education.

[4]  M. A. Breuer,et al.  Teaching computer hardware design using commercial CAD tools , 1993 .

[5]  S. A. Steele,et al.  A Course Sequence for the Teaching of Digital Systems , 1966 .

[6]  Carl Burch,et al.  Logisim: a graphical system for logic circuit design and simulation , 2002, JERC.

[7]  Parthasarathy Guturu,et al.  An innovative method of teaching digital system design in an undergraduate electrical and computer engineering curriculum , 2009, 2009 IEEE International Conference on Microelectronic Systems Education.

[8]  B. Zajc,et al.  A rapid prototyping environment for teaching digital logic design , 1998 .

[9]  John T. Stasko,et al.  Please address correspondence to , 2000 .

[10]  Eileen Kraemer,et al.  Balanced cognitive load significantly improves the effectiveness of algorithm animation as a problem-solving tool , 2008, J. Vis. Lang. Comput..

[11]  Renate Sitte,et al.  Interactive teaching of elementary digital logic design with WinLogiLab , 2004, IEEE Transactions on Education.

[12]  Murizah Kassim,et al.  Incorporating VHDL in teaching combinational logic circuit , 2010, 2010 2nd International Congress on Engineering Education.

[13]  Norman Hendrich A Java-based framework for simulation and teaching: Hades , 2000 .

[14]  José Nelson Amaral,et al.  Teaching digital design to computing science students in a single academic term , 2005, IEEE Transactions on Education.

[15]  D. Timmermann,et al.  LoGen -- Generation and Simulation of Digital Logic on the Gate-Level via Internet , 2006, 2006 1ST IEEE International Conference on E-Learning in Industrial Electronics.