High-level synthesis of asynchronous systems by data-driven decomposition

We present a method for decomposing a high-level program description of a circuit into a system of concurrent modules that can each be implemented as asynchronous pre-charge half-buffer pipeline stages (the circuits used in the asynchronous R3000 MIPS microprocessor). We apply it to designing the instruction fetch of an asynchronous 8051 microcontroller, with promising results. We discuss new clustering algorithms that will improve the performance figures further.

[1]  Karl Papadantonakis,et al.  The Lutonium: a sub-nanojoule asynchronous 8051 microcontroller , 2003, Ninth International Symposium on Asynchronous Circuits and Systems, 2003. Proceedings..

[2]  Alain J. Martin,et al.  Synthesis of Self-Timed Circuits by Program Transformation , 1987 .

[3]  Alain J. Martin,et al.  ET 2 : a metric for time and energy efficiency of computation , 2002 .

[4]  Paul I. Pénzes,et al.  An energy estimation method for asynchronous circuits with application to an asynchronous microprocessor , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

[5]  Alain J. Martin,et al.  Slack Elasticity in Concurrent Computing , 1998, MPC.

[6]  C.H. van Berkel,et al.  Compilations of communicating processes into delay-insensitive circuits , 1988, Proceedings 1988 IEEE International Conference on Computer Design: VLSI.

[7]  Paul I. Pénzes,et al.  The design of an asynchronous MIPS R3000 microprocessor , 1997, Proceedings Seventeenth Conference on Advanced Research in VLSI.

[8]  Niraj K. Jha,et al.  MINIMALIST: An Environment for the Synthesis, Verification and Testability of Burst-Mode Asynchronous Machines , 1999 .

[9]  Ad M. G. Peeters,et al.  An asynchronous low-power 80C51 microcontroller , 1998, Proceedings Fourth International Symposium on Advanced Research in Asynchronous Circuits and Systems.

[10]  Charles E. Leiserson,et al.  Optimizing Synchronous Circuitry by Retiming (Preliminary Version) , 1983 .

[11]  D. A. Edwards,et al.  The Balsa Asynchronous Circuit Synthesis System , 2000 .

[12]  Alain J. Martin.  Programming in VLSI: from communicating processes to delay-insensitive circuits , 1991 .

[13]  Luciano Lavagno,et al.  Petrify: A Tool for Manipulating Concurrent Specifications and Synthesis of Asynchronous Controllers (Special Issue on Asynchronous Circuit and System Design) , 1997 .

[14]  Alain J. Martin,et al.  Data-driven process decomposition for circuit synthesis , 2001, ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.01EX483).