论文信息 - Highly linear mm-wave CMOS low noise amplifier

Highly linear mm-wave CMOS low noise amplifier

This paper presents a highly linear mm-wave low noise amplifier utilizing a linear attenuating output stage. An analytical method is given for optimum design of this stage by Volterra series. Using a 0.13µum CMOS technology, the IIP3 is improved by more than 10dB reaching to +6dBm, without any extra power consumption. The LNA has a flat gain of 12.7dB with less than ±0.1dB variation from 26 to 35.8GHz and consumes 15.6mW of power. While the input-output matching requirements are well satisfied for this LNA, its noise figure is below 3.7dB over the entire band.

Abdolreza Nabavi | Kambiz Hadipour | A. Nabavi | Kambiz Hadipour

[1] Kwyro Lee,et al. Highly linear receiver front-end adopting MOSFET transconductance linearization by multiple gated transistors , 2004, IEEE J. Solid State Circuits.

[2] H. Dogan,et al. Intermodulation Distortion in CMOS Attenuators and Switches , 2007, IEEE Journal of Solid-State Circuits.

[3] Heng Zhang,et al. A Low-Power, Linearized, Ultra-Wideband LNA Design Technique , 2009, IEEE Journal of Solid-State Circuits.

[4] Sang-Gug Lee,et al. A 5.2-GHz LNA in 0.35-μm CMOS utilizing inter-stage series resonance and optimizing the substrate resistance , 2003, IEEE J. Solid State Circuits.

[5] Kwyro Lee,et al. Highly linear receiver front-end adopting MOSFET transconductance linearization by multiple gated transistors , 2004, IEEE Journal of Solid-State Circuits.

[6] Abdolreza Nabavi,et al. Ultra-wideband CMOS low noise amplifier with Flat Gain , 2009, IEICE Electron. Express.

[7] E. Sánchez-Sinencio,et al. A Highly Linear Low-Noise Amplifier , 2006, IEEE Transactions on Microwave Theory and Techniques.

[8] Ali M. Niknejad,et al. A Highly Linear Broadband CMOS LNA Employing Noise and Distortion Cancellation , 2007, IEEE Journal of Solid-State Circuits.