STUDY OF VARIOUS FACTORS AFFECTING PERFORMANCE OF MULTI-CORE PROCESSORS
暂无分享,去创建一个
[1] Luiz André Barroso,et al. Piranha: a scalable architecture based on single-chip multiprocessing , 2000, Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat. No.RS00201).
[2] Tze-Chiang Chen. Where CMOS is going: trendy hype vs. real technology , 2006, 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers.
[3] David W. Anderson,et al. The IBM System/360 model 91: machine philosophy and instruction-handling , 1967 .
[4] David W. Wall,et al. Limits of instruction-level parallelism , 1991, ASPLOS IV.
[5] Norman P. Jouppi,et al. Register file design considerations in dynamically scheduled processors , 1996, Proceedings. Second International Symposium on High-Performance Computer Architecture.
[6] Jinuk Luke Shin,et al. The UltraSPARC T1 Processor: CMT Reliability , 2006, IEEE Custom Integrated Circuits Conference 2006.
[7] M. Horowitz,et al. How scaling will change processor architecture , 2004, 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).
[8] Milo M. K. Martin,et al. Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset , 2005, CARN.