Dynamic Load Generator: Synthesising dynamic hardware load characteristics

In this thesis we proposed and tested a new method for creating synthetic workloads. Our method takes the dynamic behaviour into consideration, whereas previous studies only consider the static behaviour. This was done by recording performance monitor counters (PMC) events from a reference application. These events were then used to calculate the hardware load characteristics, in our case cache miss ratios, that were stored for each sample and used as input to a load regulator. A signalling application was then used together with a load regulator and a cache miss generator to tune the hardware characteristics until they were similar to those of the reference application. For each sample, the final parameters from the load regulator were stored in order to be able to simulate it. By simulating all samples with the same sampling period with which they were recorded, the dynamic behaviour of the reference application could be simulated. Measurements show that this was successful for L1 D$ miss ratio, but not for L1 I$ miss ratio and only to a small extent for L2 D$ miss ratio. We were also able to show that the total convergence time for the regulator could be reduced by using case-based reasoning to select the initial parameters from similar samples.

[1]  Robert B. Burns,et al.  Introduction to Research Methods , 2015, Research Methods for Political Science.

[2]  Lizy Kurian John,et al.  Improved automatic testcase synthesis for performance model validation , 2005, ICS '05.

[3]  Won Woo Ro,et al.  Workload synthesis: Generating benchmark workloads from statistical execution profile , 2014, 2014 IEEE International Symposium on Workload Characterization (IISWC).

[4]  Marcus Jägemar.  Technical Report : Feedback-Based Generation of Hardware Characteristics , 2012 .

[5]  David J. DeWitt,et al.  An evaluation of buffer management strategies for relational database systems , 1986, Algorithmica.

[6]  C. Robson,et al.  Real World Research: A Resource for Social Scientists and Practitioner-Researchers , 1993 .

[7]  Lizy Kurian John,et al.  Automatic Generation of Miniaturized Synthetic Proxies for Target Applications to Efficiently Design Multicore Processors , 2014, IEEE Transactions on Computers.

[8]  Henry C. Lucas.  Synthetic program specifications for performance evaluation , 1972, ACM '72.

[9]  Henry C. Lucas,et al.  Performance Evaluation and Monitoring , 1971, CSUR.

[10]  Dirk Herrmann,et al.  Foundations Of Soft Case Based Reasoning , 2016 .

[11]  Per Runeson,et al.  Guidelines for conducting and reporting case study research in software engineering , 2009, Empirical Software Engineering.

[12]  Agnar Aamodt,et al.  Case-Based Reasoning: Foundational Issues, Methodological Variations, and System Approaches , 1994, AI Commun..

[13]  Brendan Gregg,et al.  Systems Performance: Enterprise and the Cloud , 2013 .

[14]  Raj Jain,et al.  The art of computer systems performance analysis - techniques for experimental design, measurement, simulation, and modeling , 1991, Wiley professional computing.

[15]  Janak H. Patel,et al.  A low-overhead coherence solution for multiprocessors with private cache memories , 1984, ISCA '84.

[16]  Juliane Junker,et al.  Computer Organization And Design The Hardware Software Interface , 2016 .

[17]  Lizy K. John,et al.  The Case for Automatic Synthesis of Miniature Benchmarks , 2005 .

[18]  Sigrid Eldh,et al.  Automatic Benchmarking for Early-Stage Performance Verification of Industrial Systems , 2016 .

[19]  Khaled El Emam,et al.  Comparing case-based reasoning classifiers for predicting high risk software components , 2001, J. Syst. Softw..

[20]  Lizy Kurian John,et al.  Performance Evaluation : Techniques , Tools and Benchmarks , 2004 .

[21]  Philip Heidelberger,et al.  Computer Performance Evaluation Methodology , 1984, IEEE Transactions on Computers.

[22]  Carl Staelin,et al.  lmbench: Portable Tools for Performance Analysis , 1996, USENIX Annual Technical Conference.

[23]  Lizy Kurian John,et al.  Synthesizing memory-level parallelism aware miniature clones for SPEC CPU2006 and ImplantBench workloads , 2010, 2010 IEEE International Symposium on Performance Analysis of Systems & Software (ISPASS).

[24]  Mohammed El Shobaki.  On-chip monitoring for non-intrusive hardware/software observability , 2004 .

[25]  Aniruddha S. Gokhale,et al.  Tools for Continuously Evaluating Distributed System Qualities , 2010, IEEE Software.

[26]  Sigrid Eldh,et al.  Towards Feedback-Based Generation of Hardware Characteristics , 2012 .