Performance Analysis of Subthreshold 32-Bit Kogge-Stone Adder for Worst-Case-Delay and Power in Sub-micron Technology

Subthreshold logic operation can drastically reduce power, if the decreased frequency operation is of secondary importance. In this paper, a 32-bit Kogge-Stone (KS) adder, which is a basic functional unit of most computational platforms, in sub-threshold logic using UMC 180nm and UMC90nm CMOS technology is presented. The performance parameters of the adder such as average power, worst-case-delay and power-delay-product at all five corners with temperature ranging from 00C to 1000C are investigated. The 32-bit adder is simulated using Spectre Simulator in Cadence environment. Finally, Monte-Carlo Simulation was done to calculate the worst case delay for 180nm CMOS Technology.