Exploiting reconfigurable SWP operators for multimedia applications

Implementing image processing applications in embedded systems is a difficult challenge due to the drastic constraints in terms of cost, energy consumption and real time execution. Reconfigurable architectures are good candidates to take-up this challenge and especially when the architecture is able to support different word-lengths of pixel through Sub-Word Parallelism (SWP) capabilities. Exploiting the diversity of supported data-types requires automation tools able to optimize the data word-length under an accuracy constraint. In this paper, a new approach for word-length optimization in the case of SWP operations is proposed. Compared to existing approaches the optimization time is significantly reduced without sacrificing the quality of the optimized solution. The results show the ability of our approach to exploit the SWP capabilities associated with multimedia processors.

[1]  Heinrich Meyr,et al.  Fast bit-true simulation , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

[2]  Wonyong Sung,et al.  AUTOSCALER for C: an optimizing floating-point to integer C program converter for fixed-point digital signal processors , 2000 .

[3]  François Charot,et al.  Scheduling, binding and routing system for a run-time reconfigurable operator based multimedia architecture , 2010, 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP).

[4]  Seehyun Kim,et al.  Fixed-point optimization utility for C and C++ based digital signal processing programs , 1998 .

[5]  Daniel Ménard,et al.  Floating-to-Fixed-Point Conversion for Digital Signal Processors , 2006, EURASIP J. Adv. Signal Process..

[6]  Romuald Rocher,et al.  Analytical accuracy evaluation of fixed-point systems , 2007, 2007 15th European Signal Processing Conference.

[7]  Yvon Savaria,et al.  A comparison of automatic word length optimization procedures , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

[8]  Daniel Ménard,et al.  Reconfigurable Operator Based Multimedia Embedded Processor , 2009, ARC.

[9]  Heinrich Meyr,et al.  Design and DSP Implementation of Fixed-Point Systems , 2002, EURASIP J. Adv. Signal Process..