Impact of Gate–Drain Spacing on Low-Frequency Noise Performance of In Situ SiN Passivated InAlGaN/GaN MIS-HEMTs

In this paper we investigated the gate–drain access region spacing (<inline-formula> <tex-math notation="LaTeX">$L_{\mathrm {GD}})$ </tex-math></inline-formula> effect on electrical and noise performance of InAlGaN/GaN metal–insulator–semiconductor high electron mobility transistors (MIS-HEMTs) using in situ SiN cap layer as gate insulator. Different <inline-formula> <tex-math notation="LaTeX">$L_{\mathrm {GD}}$ </tex-math></inline-formula> of InAlGaN/GaN MIS-HEMTs using sub-10 nm barrier layer are studied. Low-frequency noise measurements have been carried out for the first time in order to analyze the impact of the gate–drain spacing on the electrical characteristics. The noise of the channel under the gate has been identified as the dominant channel noise source for <inline-formula> <tex-math notation="LaTeX">$L_{\mathrm {GD}} < 10~\mu \text{m}$ </tex-math></inline-formula>. Finally, the calculated Hooge parameter (<inline-formula> <tex-math notation="LaTeX">$\alpha _{H})$ </tex-math></inline-formula> is equal to <inline-formula> <tex-math notation="LaTeX">$3.1\times 10^{-4}$ </tex-math></inline-formula>. It reflects the high material quality while using sub-10 nm InAlGaN layer, which is promising for high-frequency applications.

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