Design and Implementation of a Systolic Architecture for Low Power Wireless Sensor Network

In this paper, we propose a unique systolic structure and communication algorithm that maintains a solid link between nodes using synchronous digital communication and enables low power communication. This system was designed by using CC2500 RF transceiver, CC2590 RF front end and C8051F330 low power microcontroller. The measurement of power consumption in the network link shows below 400μW in data transfer rate 320bps. The system constitutes the base unit of low power wireless network that was composed of each seven link nodes having eight sensor nodes. Results of the experiments show that link nodes using a 4Ah battery could operate over 3 years without replacement.