The first IA-64 microprocessor: a design for highly-parallel execution

The first implementation of the IA-64 architecture achieves high performance by implementing a highly parallel execution core, while maintaining binary compatibility with the IA-32 instruction set. The processor contains 25.4 M transistors. The chip is fabricated in a 0.18 /spl mu/m CMOS process with 6 metal layers and packaged in a 1012-pad organic land grid array using C4 (flip-chip) assembly technology.

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