Fabrication Defects and Fault Models for DNA Self-Assembled Nanoelectronics

The self-assembly of nanoelectronic devices provides an opportunity to achieve unprecedented density and manufacturing scale in the post-Moore's Law era. Bottom-up DNA self-assembly has emerged as a promising technique towards achieving this vision and it has been used to demonstrate precise patterning and functionalization at resolutions below 20 nm. However, a lack of understanding of fabrication defects and their impact on circuit behavior are major obstacles to the eventual application of these substrates to circuit design. We present a classification of defects observed in our experimental work on self-assembled nanostructures. Atomic force microscope (AFM) images are used to study these defects and determine their relative frequencies. We connect these defects to fault models and predict their likely impact on the behavior of logic gates. This work will be useful in predicting the potential success of defect-tolerance techniques for DNA self-assembled nanoelectronic substrates.