A 2V, 2.3/4.6 GHz dual-band CMOS frequency synthesizer
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[1] Keng L. Wong,et al. A PLL clock generator with 5 to 110 MHz of lock range for microprocessors , 1992 .
[2] B. Razavi,et al. A 2.6-GHz/5.2-GHz frequency synthesizer in 0.4-/spl mu/m CMOS technology , 2000, 1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326).
[3] M. Steyaert,et al. A 2-V CMOS cellular transceiver front-end , 2000, IEEE Journal of Solid-State Circuits.
[4] A. Abidi,et al. A 2 . 4-GHz Low-IF Receiver for Wideband WLAN in 0 . 6-m CMOS — Architecture and Front-End , 2000 .
[5] Robert G. Meyer,et al. Future directions in silicon ICs for RF personal communications , 1995, Proceedings of the IEEE 1995 Custom Integrated Circuits Conference.
[6] Ting-Ping Liu,et al. A 6.5 GHz monolithic CMOS voltage-controlled oscillator , 1999 .
[7] Jan Craninckx,et al. A 1.75-GHz/3-V dual-modulus divide-by-128/129 prescaler in 0.7-/spl mu/m CMOS , 1996 .
[8] Ting-Ping Liu. A 6.5 GHz monolithic CMOS voltage-controlled oscillator , 1999, 1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278).
[9] A.A. Abidi,et al. A 2.4-GHz low-IF receiver for wideband WLAN in 6-/spl mu/m CMOS-architecture and front-end , 2000, IEEE Journal of Solid-State Circuits.
[10] Jacques C. Rudell,et al. A 1.9-GHz wide-band IF double conversion CMOS receiver for cordless telephone applications , 1997, IEEE J. Solid State Circuits.
[11] R. B. Nubling,et al. A high-speed multimodulus HBT prescaler for frequency synthesizer applications , 1991 .