A Real-Time Intent Recognition System Based on SoC-FPGA for Robotic Transtibial Prosthesis

This paper presents the design and implementation of a real-time intent recognition hardware system for robotic transtibial prosthesis, based on system-on-chip and field-programmable gate array (SoC-FPGA). The proposed system integrates the software programmability of an ARM-based processor with the hardware programmability of an FPGA. A hardware prototype was developed and a SVM-based pattern recognition algorithm was implemented with high-level synthesis technology. Experiments on a transtibial amputee subject demonstrated that the proposed system costs shorter decision time in identifying four lower-limb movement phases (sitting, standing, sit-to-stand and stand-to-sit).

[1]  Long Wang,et al.  On the Design of a Powered Transtibial Prosthesis With Stiffness Adaptable Ankle and Toe Joints , 2014, IEEE Transactions on Industrial Electronics.

[2]  Qining Wang,et al.  Metabolic cost of level-ground walking with a robotic transtibial prosthesis combining push-off power and nonlinear damping behaviors: Preliminary results , 2016, 2016 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC).

[3]  Qing Yang,et al.  Implementing an FPGA system for real-time intent recognition for prosthetic legs , 2012, DAC Design Automation Conference 2012.

[4]  Philippe Coussy,et al.  High-Level Synthesis: from Algorithm to Digital Circuit , 2008 .

[5]  Bram Vanderborght,et al.  Design and Validation of the Ankle Mimicking Prosthetic (AMP-) Foot 2.0 , 2014, IEEE Transactions on Neural Systems and Rehabilitation Engineering.

[6]  D. Winter,et al.  Biomechanics of below-knee amputee gait. , 1988, Journal of biomechanics.

[7]  Long Wang,et al.  Adaptive Slope Walking With a Robotic Transtibial Prosthesis Based on Volitional EMG Control , 2015, IEEE/ASME Transactions on Mechatronics.

[8]  Daniel D. Gajski,et al.  High ― Level Synthesis: Introduction to Chip and System Design , 1992 .

[9]  Jonathan Rose,et al.  Measuring the Gap Between FPGAs and ASICs , 2007, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[10]  George A. Constantinides,et al.  A High Throughput FPGA-Based Floating Point Conjugate Gradient Implementation for Dense Matrices , 2010, TRETS.

[11]  Berin Martini,et al.  Recurrent Neural Networks Hardware Implementation on FPGA , 2015, ArXiv.

[12]  Sandrine Vaton,et al.  Hardware acceleration of SVM-based traffic classification on FPGA , 2012, 2012 8th International Wireless Communications and Mobile Computing Conference (IWCMC).

[13]  Minh N. Do,et al.  Youn-Long Steve Lin , 1992 .

[14]  Andrew H Hansen,et al.  Biomechanics of the ankle-foot system during stair ambulation: implications for design of advanced ankle-foot prostheses. , 2012, Journal of biomechanics.

[15]  Philippe Coussy,et al.  High-Level Synthesis , 2008 .

[16]  Hugh M. Herr,et al.  Powered Ankle--Foot Prosthesis Improves Walking Metabolic Economy , 2009, IEEE Transactions on Robotics.

[17]  Michael Goldfarb,et al.  Multiclass Real-Time Intent Recognition of a Powered Lower Limb Prosthesis , 2010, IEEE Transactions on Biomedical Engineering.

[18]  Nicholas P. Fey,et al.  Intent Recognition in a Powered Lower Limb Prosthesis Using Time History Information , 2013, Annals of Biomedical Engineering.

[19]  Khaled Benkrid,et al.  High-Performance Quasi-Monte Carlo Financial Simulation: FPGA vs. GPP vs. GPU , 2010, TRETS.