A Pipeline Implementation of a Watershed Algorithm on FPGA

The watershed transformation is a popular image segmentation technique for grey scale images. This paper describes a pipeline implementation of a watershed algorithm designed for hardware implementation. In the algorithm, pixels in a given image are repeatedly scanned from top-left to bottom-right, and then from bottom-right to top-left in order to propagate the value of each pixel to its neighbors. In the implementation, w-sets of k-lines are buffered on the FPGA, and the algorithm is repeatedly applied to w-sets, shifting in a new set from the external memory banks and shifting out the oldest set to other external memory banks, w and k can be chosen according to the number of the external memory banks and the size of the FPGA. Therefore, it is possible to realize the best performance on a given hardware platform.