FFT Architectures: A Review

Fast Fourier Transform (FFT) is one of the most efficient algorithm widely used in the field of modern digital signal processing to compute the Discrete Fourier Transform (DFT).FFT is used in everything from broadband to 3G and Digital TV to radio LAN’s. Due to its intensive computational requirements, it occupies large area and consumes high power in hardware. Different efficient algorithms are developed to improve its architecture. This paper gives an overview of the work done of different FFT processor previously. The comparison of different architecture is also discussed.

[1]  Pei-Yun Tsai,et al.  A Generalized Conflict-Free Memory Addressing Scheme for Continuous-Flow Parallel-Processing FFT Processors With Rescheduling , 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[2]  Bevan M. Baas,et al.  The design of a reconfigurable continuous-flow mixed-radix FFT processor , 2009, 2009 IEEE International Symposium on Circuits and Systems.

[3]  Hsiang-Feng Chi,et al.  A cost-effective memory-based real-valued FFT and Hermitian symmetric IFFT processor for DMT-based wire-line transmission systems , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[4]  Hanho Lee,et al.  A High-Speed Two-Parallel Radix-24 FFT/IFFT Processor for MB-OFDM UWB Systems , 2008, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

[5]  Chen-Yi Lee,et al.  A Generalized Mixed-Radix Algorithm for Memory-Based FFT Processors , 2010, IEEE Transactions on Circuits and Systems II: Express Briefs.

[6]  Keshab K. Parhi,et al.  A Pipelined FFT Architecture for Real-Valued Signals , 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.

[7]  Anantha Chandrakasan,et al.  Energy-aware architectures for a real-valued FFT implementation , 2003, ISLPED '03.

[8]  Shousheng He,et al.  Design and implementation of a 1024-point pipeline FFT processor , 1998, Proceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143).

[9]  A. Lamba,et al.  REVIEW ON FFT PROCESSOR FOR OFDM SYSTEM , 2014 .

[10]  Myung Hoon Sunwoo,et al.  New continuous-flow mixed-radix (CFMR) FFT Processor using novel in-place strategy , 2005, IEEE Transactions on Circuits and Systems I: Regular Papers.

[11]  Douglas L. Jones,et al.  Real-valued fast Fourier transform algorithms , 1987, IEEE Trans. Acoust. Speech Signal Process..

[12]  Keshab K. Parhi,et al.  Pipelined Parallel FFT Architectures via Folding Transformation , 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[13]  Dionysios I. Reisis,et al.  Conflict-Free Parallel Memory Accessing Techniques for FFT Architectures , 2008, IEEE Transactions on Circuits and Systems I: Regular Papers.

[14]  M. S. Mohamed,et al.  VLSI based FFT Processor with Improvement in Computation Speed and Area Reduction , 2013 .

[15]  Keshab K. Parhi,et al.  An In-Place FFT Architecture for Real-Valued Signals , 2013, IEEE Transactions on Circuits and Systems II: Express Briefs.

[16]  Peter Liu,et al.  Minimizing the memory requirement for continuous flow FFT implementation: continuous flow mixed mode FFT (CFMM-FFT) , 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).