Adaptive recoding CORDIC

Conventional Coordinate Rotation Digital Computer (CORDIC) algorithm is an effective implementation of trigonometric function, and it has been widely applied in digital signal processing. In this paper, we propose a novel CORDIC architecture based on Scaling Free (SF) theory, which adopts adaptive recoding method to reduce the iterations and eliminate the scaling factor. The proposed scheme has been synthesized using 65nm CMOS technology with standard cell library. Compared with SFB4C, our scheme saves 21.11% to 34.64% hardware-overhead with no performance penalty.

[1]  Swapna Banerjee,et al.  Modified virtually scaling-free adaptive CORDIC rotator algorithm and architecture , 2005, IEEE Transactions on Circuits and Systems for Video Technology.

[2]  Yu Hen Hu,et al.  The quantization effects of the CORDIC algorithm , 1992, IEEE Trans. Signal Process..

[3]  Jack E. Volder The CORDIC Trigonometric Computing Technique , 1959, IRE Trans. Electron. Comput..

[4]  Ayman Alfalou,et al.  Direct Digital Frequency Synthesizer with CORDIC Algorithm and Taylor Series Approximation for Digital Receivers , 2009 .

[5]  Javier Hormigo,et al.  Enhanced Scaling-Free CORDIC , 2010, IEEE Transactions on Circuits and Systems I: Regular Papers.

[6]  An-Yeu Wu,et al.  Mixed-scaling-rotation CORDIC (MSR-CORDIC) algorithm and architecture for high-performance vector rotational DSP applications , 2005, IEEE Transactions on Circuits and Systems I: Regular Papers.