Simulation of mixed-signal circuits for crosstalk evaluation

This paper presents an approach for simulation of mixed-signal circuits, analyzing possible sources of disturbances in analog-digital integrated systems, such as current pulses drawn from voltage supplies. A closed-form expression of voltage and current in the pull-up and the pull-down of a CMOS logic gate can be derived. A computer program demonstrates the feasibility of the proposed approach. Simulation results of a non-overlapped two-phase clock generator are presented