A Domain-Specific Language and Compiler for Stencil Computations on Short-Vector SIMD and GPU Architectures

Stencil computations are an integral part of applications in a number of scientific computing domains, such as image processing and partial differential equations. We describe a domain-specific language for regular stencil computations, that allows specification of the computations in a concise manner. We describe a multi-target compiler for this DSL, that generates optimized code for multi-core processors with short-vector SIMD engines, as well as GPUs. The hardware differences between these two types of architecture prompt different optimization strategies for the compiler. A data layout transformation along with split tiling is used for multi-core CPUs, while overlapped tiling is used for GPUs. We evaluate our domain-specific compiler for a number of benchmarks on CPU and GPU platforms.

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