RTL Implementations of GF(2) and GF(4) Arithmetic Components

Logic design for security application requires the use of specific encoding and higher radix elements thus implying an additional level of abstraction – a component level which is subsequently mapped into a gate level netlist. Implementation of particular components can be made in different ways, however RTL-based design of the multi-valued logic components is of more practical interest as it better integrates to the conventional EDA flow. This report presents possible implementations of Galois Field arithmetic components using typical library cells and the estimation of their physical characteristics for AMS C35 (0.35μm) library. The proposed component design is suggested to be used in further research of multi-valued logic synthesis for security applications, particularly in mixed radix Reed-Muller expansions.

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