The Rule-Based Approach to Reconfiguration of 2-D Processor Arrays
暂无分享,去创建一个
[1] Phill Kyu Rhee,et al. On the reconfiguration of vlsi/wsi processor arrays , 1990 .
[2] José A. B. Fortes,et al. The Full-Use-of-Suitable-Spares (FUSS) Approach to Hardware Reconfiguration for Fault-Tolerant Processor Arrays , 1990, IEEE Trans. Computers.
[3] Fabrizio Lombardi,et al. Reconfiguration of VLSI arrays by covering , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[4] Silvio Micali,et al. An O(v|v| c |E|) algoithm for finding maximum matching in general graphs , 1980, 21st Annual Symposium on Foundations of Computer Science (sfcs 1980).
[5] Sudhakar M. Reddy,et al. On the Design of Fault-Tolerant Two-Dimensional Systolic Arrays for Yield Enhancement , 1989, IEEE Trans. Computers.
[6] W. Kent Fuchs,et al. Efficient Spare Allocation for Reconfigurable Arrays , 1987 .
[7] P. K. Rhee,et al. A variable domain approach to reconfiguration of WSI processor arrays , 1991, 1991 Proceedings, International Conference on Wafer Scale Integration.
[8] C.H. Stapper,et al. Integrated circuit yield statistics , 1983, Proceedings of the IEEE.
[9] Mariagiovanna Sami,et al. Fault Tolerance Through Reconfiguration in VLSI and WSI Arrays , 1989 .