Design of Write Buffer for Embedded Processor

In order to reduce the waiting time of write operations from CPU to main memory and improve the whole efficiency of embedded system,a kind of write buffer including 8 data buffer slots and 4 address buffer slots is designed.A special shift control circuit and one additional flag bit are provided to realize the functions of auto shift and mapping of data and addresses.Hsim simulation tool is used to simulate and verify the circuits.The result shows this write buffer can realize the First-In-First-Out(FIFO) function of data and addresses correctly and fast,reduce the CPU waiting time efficiently,and thus improve the whole efficiency of system.