VLSI Hierarchical Placement Using Discrete Tunneling Algorithm

In this paper we propose a discrete version of tunneling algorithm and apply it to a placement problem of VLSI layout. Although tunneling algorithm is powerful to obain a near global minimum of multimodal function optimization, it is applicable only to continuous optimization problems. We incorporate a heuristic search method into conventional tunneling algorithm so that tunneling algorithm can deal with discrete optimization problems such as VLSI placement and routing problems. We also introduce a hierarchical placement model in order to improve the search efficiency of tunneling algorithm and to reduce its computation time. Computational experiments show that proposed hierarchical method obtains better placement results with shorter running time than non-hierarchical method.