Memristor-CMOS hybrid integrated circuits for reconfigurable logic.
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Warren Robinett | Qiangfei Xia | Xuema Li | Gilberto Medeiros-Ribeiro | Wei Wu | Dmitri B Strukov | J Joshua Yang | Michael W Cumbie | Neel Banerjee | Thomas J Cardinali | William M Tong | Gregory S Snider | R Stanley Williams | J. Yang | Xuema Li | R. Williams | G. Medeiros-Ribeiro | Wei Wu | W. Tong | D. Strukov | G. Snider | Q. Xia | W. Robinett | R. S. Williams | M. Cumbie | Neel Banerjee | T. Cardinali | R. S. Williams | J. J. Yang | William M Tong | Gregory S Snider | Qiangfei Xia | William M. Tong | Gregory S. Snider
[1] Gregory S. Snider,et al. A Defect-Tolerant Computer Architecture: Opportunities for Nanotechnology , 1998 .
[2] D. Strukov,et al. CMOL FPGA: a reconfigurable architecture for hybrid digital circuits with two-terminal nanodevices , 2005 .
[3] Wei Zhang,et al. Multilayer resist methods for nanoimprint lithography on nonflat surfaces , 1998 .
[4] Warren Robinett,et al. On the integration of memristors with CMOS using nanoimprint lithography , 2009, Advanced Lithography.
[5] Stephen Y. Chou,et al. Imprint of sub-25 nm vias and trenches in polymers , 1995 .
[6] André DeHon,et al. Seven strategies for tolerating highly defective fabrication , 2005, IEEE Design & Test of Computers.
[7] G. Snider,et al. Self-organized computation with unreliable, memristive nanodevices , 2007 .
[8] J. Yang,et al. Memristive switching mechanism for metal/oxide/metal nanodevices. , 2008, Nature nanotechnology.
[9] Nianhua Li. Application of nanoimprint lithography in nano-electronic devices , 2008 .
[10] G.E. Moore,et al. Cramming More Components Onto Integrated Circuits , 1998, Proceedings of the IEEE.
[11] R. Williams,et al. Nano/CMOS architectures using a field-programmable nanowire interconnect , 2007 .
[12] S. Chou,et al. Imprint Lithography with 25-Nanometer Resolution , 1996, Science.