7.3 A 1000fps vision chip based on a dynamically reconfigurable hybrid architecture comprising a PE array and self-organizing map neural network

A vision chip is a high-speed and compact vision system that integrates an image sensor and parallel image processors on a single silicon die. Nowadays, high-speed vision chips with powerful recognition capabilities are greatly demanded in applications such as: industrial automation, security, entertainment, robotic vision, and human-machine interaction. Some 100-to-1,000fps vision chips have been reported [1-4]. These chips integrate pixel-parallel and row-parallel SIMD array processors to speed up low- and mid-level image processing [1,2]. Recently, microprocessors (MPU) have been embedded to carry out high-level image processing [3,4]. Although excellent in low- and mid-level processing, these systems are poor in high-level feature vector (FV) recognition tasks due to the von Neumann bottleneck of the MPU. As a consequence, these chips can no longer achieve 1,000fps system-level performance, from image acquisition to high-level feature-recognition processing.

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[2]  Stanislaw Szczepanski,et al.  An Analog Sub-Miliwatt CMOS Image Sensor With Pixel-Level Convolution Processing , 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.

[3]  Wancheng Zhang,et al.  A Programmable SIMD Vision Chip for Real-Time Vision Applications , 2008, IEEE Journal of Solid-State Circuits.

[4]  T. Shibata,et al.  A Real-Time Image-Feature-Extraction and Vector-Generation VLSI Employing Arrayed-Shift-Register Architecture , 2007, IEEE Journal of Solid-State Circuits.

[5]  Liang-Gee Chen,et al.  iVisual: An intelligent visual sensor SoC with 2790fps CMOS image sensor and 205GOPS/W vision processor , 2008, 2008 45th ACM/IEEE Design Automation Conference.

[6]  D. C. Hendry,et al.  IP core implementation of a self-organizing neural network , 2003, IEEE Trans. Neural Networks.