A $$0.058\,\hbox {mm}^2\,\,24\,\upmu \hbox {W}$$0.058mm224μW Temperature Sensor in $$40\,\hbox {nm}$$40nm CMOS Process with $${\pm }\,0.5\,^{\circ }\hbox {C}$$±0.5∘C Inaccuracy from − 55 to $$175\,^{\circ }\hbox {C}$$175∘C

This paper describes the design of a high-accuracy smart temperature sensor in the 40 nm standard CMOS process. Due to process scaling, the high threshold voltages, large leakage currents and low intrinsic gains, etc., cause the realization of conventional high performance analog circuits to become very challenging in advanced processes. In the proposed design, some new techniques have been utilized in order to overcome the obstacles due to process scaling. The sensor’s frontend is based on substrate PNP transistors, couple with a two-step zooming ADC. This temperature sensor achieves a two-point calibrated inaccuracy of $${\pm }\,0.5\,^{\circ }\hbox {C}$$±0.5∘C and a one-point trimmed inaccuracy of $${\pm }\,0.8\,^{\circ }\hbox {C}$$±0.8∘C over a range of temperature from − 55 to $$175\,^{\circ }\hbox {C}$$175∘C. It draws $$20\,\upmu \hbox {A}$$20μA from a 1.2 V power supply and occupies an area of $$0.0578\,\hbox {mm}^{2}$$0.0578mm2.