Timing Analysis of Digital Circuits and the Theory of Min-Max Functions

asynchronous circuit, clock schedule verification, cycle time, fixed point, max-plus algebra, min-max function Recent progress in the timing analysis of digital circuits has involved the use of maximum and minimum timing constraints. We put forward the theory of min-max functions, a non-linear generalization of max-plus algebra, as the correct framework in which to study problems with mixed constraints. We state several new results which enable us to (a) refine and extend the work of Burns on timing metrics for asynchronous circuits and (b) explain, on the basis of general theory, the observations of Szymanski and Shenoy on the verification of clock schedules for synchronous circuits. The work described here was done as part of project STETSON, a joint project between HP Labs and Stanford University on asynchronous hardware design.