Design of a system of video information collecting based on FPGA

This article introduces a video information collecting system for anti_video leakage,which is based on FPGA. Alternating reading and writing of the two SDRAM that generates the jointless transmission buffer is controlled by programmable logical device FPGA.After video information read by FPGA, serial video information is transformed into parallel format by Bit-Plane Separation technology first,and then sent to video cable.The result of simulation and experiment show that the system is not only fulfilling the real-time request completely,but also reducing the information leakage effectively.