Characterization of edge placement accuracy in high-speed digital pin electronics
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Understanding and measuring edge placement accuracy in pin electronics designs can be a tricky and misleading process. This is especially true when the timing differences being measured are on the order of 25 ps. This paper describes some of the potential error sources in pin electronics designs and briefly explains the causes. It then describes the test methods that were used to evaluate the edge placement accuracy of a new pin electronics design for a family of high-speed digital test systems, and discusses how the techniques were carried forward to provide extremely accurate AC testing in a production environment.<<ETX>>
[1] Phil Burlison. Criteria for analyzing high frequency testing performance of VLSI automatic test equipment , 1990, Proceedings. International Test Conference 1990.