FDSOI CMOS devices featuring dual strained channel and thin BOX extendable to the 10nm node

We report FDSOI devices with a 20nm gate length (L_G) and 5nm spacer, featuring a 20% tensile strained Silicon-on-Insulator (sSOI) channel NFET and 35% [Ge] partially compressive strained SiGe-on-Insulator (SGOI) channel PFET. This work represents the first demonstration of strain reversal of sSOI by SiGe in short channel devices. At V_dd of 0.75V, competitive effective current (I_eff) reaches 550/340 μA/μm for NFET, at I_off of 100/1 nA/μm, respectively. With a fully strained 30% SGOI channel on thin BOX (20nm) substrate and V_dd of 0.75V, PFET I_eff reaches 495/260 μA/μm, at I_off of 100/1 nA/μm, respectively. Competitive sub-threshold slope and DIBL are reported. With the demonstrated advanced strain techniques and short channel performance, FDSOI devices can be extended for both high performance and low power applications to the 10nm node.