Structural computer-aided design of current-mode CMOS logic circuits

A set of CAD (computer-aided design) tools for the synthesis and layout generation of multiple-valued current-mode CMOS logic (CMCL) circuits is described. The synthesis method is based on the cost-table method. The general circuit structure, the cost-table functions, and the decomposition procedure used in the synthesis program are explained. The program is based on a logically complete set of basic elements for CMCL circuits. After circuit synthesis, the actual layout is generated using standard-cell IC design tools.<<ETX>>