Sky-RAM: Skyrmionic Random Access Memory

With the increase of the tunneling leakage current resulting from the downscaling of transistor size, cache memory based on semiconductor technologies, i.e., SRAM, is facing big challenges in keeping up with the famous Moore’s law. Nonvolatile memories as alternatives can significantly reduce the leakage power dissipation, but on the other hand, suffer from high write power and long latency for cache applications. In this letter, we propose a skyrmionic RAM (Sky-RAM) for the cache by exploiting the intrinsic advantageous features of skyrmion in terms of nanoscale size, nonvolatility, high motion velocity and low depinning current density. The proposed Sky-RAM can achieve a write speed of ~1.3 ns/bit with an energy consumption of ~29 fJ/bit. Moreover, it can achieve smaller cell size (only two transistors per cell) and negligible leakage current in comparison with SRAM. The Sky-RAM could be a good alternative for SRAM for future nonvolatile, low-power, and high-speed cache with technology advancement.