A Coupled-RTWO-Based Subharmonic Receiver Front End for 5G $E$ -Band Backhaul Links in 28-nm Bulk CMOS
暂无分享,去创建一个
[1] F. Svelto,et al. Analysis and Design of a Double-Quadrature CMOS VCO for Subharmonic Mixing at $Ka$-Band , 2008, IEEE Transactions on Microwave Theory and Techniques.
[2] Deog-Kyoon Jeong,et al. A single-chip 2.4-GHz direct-conversion CMOS receiver for wireless local loop using multiphase reduced frequency conversion technique , 2001 .
[3] Enrico Monaco,et al. A 33.6-to-46.2GHz 32nm CMOS VCO with 177.5dBc/Hz minimum noise FOM using inductor splitting for tuning extension , 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.
[4] Andrea Mazzanti,et al. A Low Phase-Noise Multi-Phase LO Generator for Wideband Demodulators Based on Reconfigurable Sub-Harmonic Mixers , 2010, IEEE Journal of Solid-State Circuits.
[5] 토마스 매트슨,et al. Method and inductor layout for reduced vco coupling , 2005 .
[6] Antonio Liscidini,et al. An Intuitive Analysis of Phase Noise Fundamental Limits Suitable for Benchmarking LC Oscillators , 2014, IEEE Journal of Solid-State Circuits.
[7] Andrea Mazzanti,et al. Insights Into Phase-Noise Scaling in Switch-Coupled Multi-Core LC VCOs for E-Band Adaptive Modulation Links , 2017, IEEE Journal of Solid-State Circuits.
[8] Davide Guermandi,et al. A Wideband Receiver for Multi-Gbit/s Communications in 65 nm CMOS , 2011, IEEE Journal of Solid-State Circuits.
[9] Andrea Mazzanti,et al. A 24 GHz Subharmonic Direct Conversion Receiver in 65 nm CMOS , 2011, IEEE Transactions on Circuits and Systems I: Regular Papers.
[10] Matteo Bassi,et al. A PVT-Tolerant >40-dB IRR, 44% Fractional-Bandwidth Ultra-Wideband mm-Wave Quadrature LO Generator for 5G Networks in 55-nm CMOS , 2018, IEEE Journal of Solid-State Circuits.
[11] G.M. Rebeiz,et al. A 77 GHz SiGe sub-harmonic balanced mixer , 2005, IEEE Journal of Solid-State Circuits.
[12] Enrico Monaco,et al. A 2–11 GHz 7-Bit High-Linearity Phase Rotator Based on Wideband Injection-Locking Multi-Phase Generation for High-Speed Serial Links in 28-nm CMOS FDSOI , 2017, IEEE Journal of Solid-State Circuits.
[13] Marco Vigilante,et al. Multiphase digitally controlled oscillator for future 5G phased arrays in 90 nm CMOS , 2016, 2016 IEEE Nordic Circuits and Systems Conference (NORCAS).
[14] Marco Vigilante,et al. On the Design of Wideband Transformer-Based Fourth Order Matching Networks for ${E}$ -Band Receivers in 28-nm CMOS , 2017, IEEE Journal of Solid-State Circuits.
[15] Mourad N. El-Gamal,et al. A Sub-mW, Ultra-Low-Voltage, Wideband Low-Noise Amplifier Design Technique , 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[16] Behzad Razavi,et al. RF Microelectronics (2nd Edition) (Prentice Hall Communications Engineering and Emerging Technologies Series) , 2011 .
[17] Andrea Bevilacqua,et al. A 40–67GHz power amplifier with 13dBm PSAT and 16% PAE in 28 nm CMOS LP , 2014, ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC).
[18] A.L. Lacaita,et al. 5-GHz Oscillator Array With Reduced Flicker Up-Conversion in 0.13-$muhboxm$CMOS , 2006, IEEE Journal of Solid-State Circuits.
[19] Marco Vigilante,et al. A Wideband Class-AB Power Amplifier With 29–57-GHz AM–PM Compensation in 0.9-V 28-nm Bulk CMOS , 2018, IEEE Journal of Solid-State Circuits.
[20] Matteo Bassi,et al. A >40dB IRR, 44% fractional-bandwidth ultra-wideband mm-wave quadrature LO generator for 5G networks in 55nm CMOS , 2018, 2018 IEEE International Solid - State Circuits Conference - (ISSCC).
[21] Peter R. Kinget,et al. Integrated GHz Voltage Controlled Oscillators , 1999 .
[22] P. Reynaert,et al. Analysis and Design of an E-Band Transformer-Coupled Low-Noise Quadrature VCO in 28-nm CMOS , 2016, IEEE Transactions on Microwave Theory and Techniques.
[23] Teerachot Siriburanon,et al. A Low-Flicker-Noise 30-GHz Class-F23 Oscillator in 28-nm CMOS Using Implicit Resonance and Explicit Common-Mode Return Path , 2018, IEEE Journal of Solid-State Circuits.
[24] Jeyanandh Paramesh,et al. A 25–30 GHz Fully-Connected Hybrid Beamforming Receiver for MIMO Communication , 2018, IEEE Journal of Solid-State Circuits.
[25] Danilo Manstretta,et al. Analysis and Design of a 54 GHz Distributed “Hybrid” Wave Oscillator Array With Quadrature Outputs , 2014, IEEE Journal of Solid-State Circuits.
[26] Laurent Dussopt,et al. Millimeter-wave access and backhauling: the solution to the exponential data traffic increase in 5G mobile communications systems? , 2014, IEEE Communications Magazine.
[27] Marco Vigilante,et al. A coupled-RTWO-based subharmonic receiver front-end for 5G E-Band backhaul links in 28nm bulk CMOS , 2018, 2018 IEEE International Solid - State Circuits Conference - (ISSCC).
[28] Piet Wambacq,et al. A 42 mW 200 fs-Jitter 60 GHz Sub-Sampling PLL in 40 nm CMOS , 2015, IEEE Journal of Solid-State Circuits.
[29] André Bourdoux,et al. 19.7 A 79GHz binary phase-modulated continuous-wave radar transceiver with TX-to-RX spillover cancellation in 28nm CMOS , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.
[30] Pietro Andreani,et al. A high-swing complementary class-C VCO , 2013, 2013 Proceedings of the ESSCIRC (ESSCIRC).
[31] L.E. Larson,et al. A 24-GHz CMOS Passive Subharmonic Mixer/Downconverter for Zero-IF Applications , 2008, IEEE Transactions on Microwave Theory and Techniques.
[32] Seiji Takeuchi,et al. A 76- to 81-GHz Multi-Channel Radar Transceiver , 2017, IEEE Journal of Solid-State Circuits.
[33] Philippe Ferrari,et al. A Programmable Frequency Multiplier-by-29 Architecture for Millimeter Wave Applications , 2015, IEEE Journal of Solid-State Circuits.
[34] Robert B. Staszewski,et al. Analysis and Design of a Multi-Core Oscillator for Ultra-Low Phase Noise , 2016, IEEE Transactions on Circuits and Systems I: Regular Papers.
[35] Zhihua Wang,et al. 25.6 A 70.5-to-85.5GHz 65nm phase-locked loop with passive scaling of loop filter , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.
[36] Andrea Bevilacqua,et al. A 40–67 GHz Power Amplifier With 13 dBm ${\rm P}_{\rm SAT}$ and 16% PAE in 28 nm CMOS LP , 2015, IEEE Journal of Solid-State Circuits.
[37] Rinaldo Castello,et al. Analysis and Design of a 195.6 dBc/Hz Peak FoM P-N Class-B Oscillator With Transformer-Based Tail Filtering , 2015, IEEE Journal of Solid-State Circuits.
[38] A. Mazzanti,et al. Class-C Harmonic CMOS VCOs, With a General Result on Phase Noise , 2008, IEEE Journal of Solid-State Circuits.
[39] Nadav Mazor,et al. High-Performance E-Band Transceiver Chipset for Point-to-Point Communication in SiGe BiCMOS Technology , 2016, IEEE Transactions on Microwave Theory and Techniques.
[40] Yulin Chen,et al. Rotary Traveling-Wave Oscillators, Analysis and Simulation , 2011, IEEE Transactions on Circuits and Systems I: Regular Papers.
[41] Robert B. Staszewski,et al. An Ultra-Low Phase Noise Class-F 2 CMOS Oscillator With 191 dBc/Hz FoM and Long-Term Reliability , 2015, IEEE Journal of Solid-State Circuits.
[42] Behzad Razavi,et al. A 300-GHz Fundamental Oscillator in 65-nm CMOS Technology , 2010, IEEE Journal of Solid-State Circuits.
[43] Willy M. C. Sansen,et al. 1.3 Analog CMOS from 5 micrometer to 5 nanometer , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.
[44] André Bourdoux,et al. A 79-GHz 2 × 2 MIMO PMCW Radar SoC in 28-nm CMOS , 2017, IEEE J. Solid State Circuits.
[45] Seizo Onoe. 1.3 Evolution of 5G mobile technology toward 1 2020 and beyond , 2016, 2016 IEEE International Solid-State Circuits Conference (ISSCC).
[46] Jonathan Wells,et al. Multi-Gigabit Microwave and Millimeter-Wave Wireless Communications , 2010 .
[47] Jaehyouk Choi,et al. A −31dBc integrated-phase-noise 29GHz fractional-N frequency synthesizer supporting multiple frequency bands for backward-compatible 5G using a frequency doubler and injection-locked frequency multipliers , 2018, 2018 IEEE International Solid - State Circuits Conference - (ISSCC).
[48] L. Larson,et al. A wide-bandwidth Si/SiGe HBT direct conversion sub-harmonic mixer/downconverter , 2000, IEEE Journal of Solid-State Circuits.
[49] T. Lee,et al. A 1.5 V, 1.5 GHz CMOS low noise amplifier , 1996 .
[50] Pietro Andreani,et al. Highly Efficient Class-C CMOS VCOs, Including a Comparison With Class-B VCOs , 2013, IEEE Journal of Solid-State Circuits.
[51] A. Bevilacqua,et al. An ultrawideband CMOS low-noise amplifier for 3.1-10.6-GHz wireless receivers , 2004, IEEE Journal of Solid-State Circuits.
[52] Patrick Reynaert,et al. A 40 nm CMOS E-Band Transmitter With Compact and Symmetrical Layout Floor-Plans , 2015, IEEE Journal of Solid-State Circuits.