Attacking AES-Masking Encryption Device with Correlation Power Analysis

Modern communication system use cryptography algorithm to ensure data still confidentiality, integrity, and authentic. There is a new vulnerability in a cryptographic algorithm when implemented on a hardware device. This vulnerability is considered capable of uncovering a secret key used in a cryptographic algorithm. This technique is known as a power analysis attack. Previous and other research introduces countermeasure to countering this new vulnerability. Some researchers suggest using logic level with encoding the AES. The countermeasure using logic is meager cost and efficient. The contribution of this paper is to analyze CPA on encryption device that has been given logic level countermeasure. Our finding of this paper is the use of encoding with one-hot masking technique does not provide the maximum countermeasure effect against CPA-based attacks. In this research, CPA attack can be successfully revealing the AES secret-key

[1]  Sylvain Guilley,et al.  Common framework to evaluate modern embedded systems against side-channel attacks , 2011, 2011 IEEE International Conference on Technologies for Homeland Security (HST).

[2]  Dong-Guk Han,et al.  An improved side channel attack using event information of subtraction , 2014, J. Netw. Comput. Appl..

[3]  Louis Goubin,et al.  DES and Differential Power Analysis (The "Duplication" Method) , 1999, CHES.

[4]  Guoqing Xu,et al.  Simple power analysis attacks using chosen message against ECC hardware implementations , 2011, 2011 World Congress on Internet Security (WorldCIS-2011).

[5]  Nidhi Goel,et al.  FPGA implementation of an 8-bit AES architecture: A rolled and masked S-Box approach , 2015, 2015 Annual IEEE India Conference (INDICON).

[6]  Christophe Clavier,et al.  Correlation Power Analysis with a Leakage Model , 2004, CHES.

[7]  Onkar S. Dhede,et al.  A review: Hardware Implementation of AES using minimal resources on FPGA , 2015, 2015 International Conference on Pervasive Computing (ICPC).

[8]  Wirawan,et al.  Performance Improvement of Secret Key Generation Scheme in Wireless Indoor Environment , 2017, Int. J. Commun. Networks Inf. Secur..

[9]  Weiwei Shan,et al.  A Secure Reconfigurable Crypto IC With Countermeasures Against SPA, DPA, and EMA , 2015, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[10]  Siva Sai Yerubandi,et al.  Differential Power Analysis , 2002 .

[11]  Sylvain Guilley,et al.  SoCs security: a war against side-channels , 2004, Ann. des Télécommunications.

[12]  Eli Biham,et al.  Differential cryptanalysis of DES-like cryptosystems , 1990, Journal of Cryptology.

[13]  Kailash J. Karande,et al.  Area optimized implementation of AES algorithm on FPGA , 2015, 2015 International Conference on Communications and Signal Processing (ICCSP).

[14]  Rita Mayer-Sommer,et al.  Smartly Analyzing the Simplicity and the Power of Simple Power Analysis on Smartcards , 2000, CHES.

[15]  Thomas S. Messerges,et al.  Investigations of Power Analysis Attacks on Smartcards , 1999, Smartcard.

[16]  R. Thandeeswaran,et al.  DPCA: Dual Phase Cloud Infrastructure Authentication , 2016, Int. J. Commun. Networks Inf. Secur..