An execution environment for reconfigurable computing
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[1] Duncan A. Buell,et al. Splash 2 - FPGAs in a custom computing machine , 1996 .
[2] Scott Hauck,et al. Reconfigurable computing: a survey of systems and software , 2002, CSUR.
[3] Seth Copen Goldstein,et al. PipeRench: A Reconfigurable Architecture and Compiler , 2000, Computer.
[4] John Wawrzynek,et al. The Garp Architecture and C Compiler , 2000, Computer.
[5] David H. Albonesi,et al. Runtime Reconfiguration Techniques for Efficient General-Purpose Computation , 2000, IEEE Des. Test Comput..
[6] Herman Schmit,et al. Efficient application representation for HASTE: Hybrid Architectures with a Single, Transformable Executable , 2003, 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2003. FCCM 2003..
[7] David A. Koufaty,et al. Hyperthreading Technology in the Netburst Microarchitecture , 2003, IEEE Micro.
[8] Andreas Moshovos,et al. CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit , 2000, ISCA '00.
[9] Michael Winston Dales,et al. Managing a reconfigurable processor in a general purpose workstation environment , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.
[10] Yanbing Li,et al. Hardware-software co-design of embedded reconfigurable architectures , 2000, DAC.
[11] Gordon J. Brebner,et al. A Virtual Hardware Operating System for the Xilinx XC6200 , 1996, FPL.
[12] P. Bertin. Memoires actives programmables : conception, realisation et programmation , 1993 .
[13] Paolo Toth,et al. Knapsack Problems: Algorithms and Computer Implementations , 1990 .
[14] John Wawrzynek,et al. Garp: a MIPS processor with a reconfigurable coprocessor , 1997, Proceedings. The 5th Annual IEEE Symposium on Field-Programmable Custom Computing Machines Cat. No.97TB100186).
[15] Kunle Olukotun,et al. REMARC : Reconfigurable Multimedia Array Coprocessor , 1999 .
[16] Zhiyuan Li,et al. Configuration management techniques for reconfigurable computing , 2002 .
[17] Ralph Wittig,et al. OneChip: an FPGA processor with reconfigurable logic , 1996, 1996 Proceedings IEEE Symposium on FPGAs for Custom Computing Machines.
[18] Kunle Olukotun,et al. REMARC (abstract): reconfigurable multimedia array coprocessor , 1998, FPGA '98.
[19] John Wawrzynek,et al. A Streaming Multi-Threaded Model , 2001 .
[20] Peter J. Denning,et al. Working Sets Past and Present , 1980, IEEE Transactions on Software Engineering.
[21] Carl Ebeling,et al. RaPiD - Reconfigurable Pipelined Datapath , 1996, FPL.
[22] Zhiyuan Li,et al. Configuration relocation and defragmentation for run-time reconfigurable computing , 2002, IEEE Trans. Very Large Scale Integr. Syst..