Timing-, heat- and area-driven placement using self-organizing semantic maps

The objective function of most placement algorithms is set only to minimize the total net length. The needs for high performance circuits have not been met by such a single objective. It is important to design placement algorithms that can satisfy requirements of timing, thermal dissipation and chip area. In a new algorithm, those factors are simultaneously optimized in a self-organizing way by means of adaptive neural semantic mapping. Experimental results are very encouraging.<<ETX>>