A 6 GS/s 9.5 bit pipelined folding-interpolating ADC with 7.3 ENOB and 52.7 dBc SFDR in the 2nd Nyquist band in 0.25 µm SiGe-BiCMOS
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M. Berroth | P. Thomas | M. Grozing | M. Epp | M. Buck | R. Bieg | J. Digel | J. Rauscher | M. Schlumpp | X.-Q Du
[1] P. Vorenkamp,et al. Fully bipolar, 120-Msample/s 10-b track-and-hold circuit , 1992 .
[2] Matthew Martin,et al. A 14b 2.5GS/s 8-way-interleaved pipelined ADC with background calibration and digital dynamic linearity correction , 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.
[3] Michael Epp,et al. A 6 Ghz input bandwidth 2 Vpp-diff input range 6.4 GS/s track-and-hold circuit in 0.25 μm BiCMOS , 2013, 2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).
[4] Pier Andrea Francese,et al. A 1.8 V 1.0 GS/s 10b Self-Calibrating Unified-Folding-Interpolating ADC With 9.1 ENOB at Nyquist Frequency , 2009, IEEE Journal of Solid-State Circuits.