Efficient Guided Symbolic Reachability Using Reachability Expressions

Asynchronous systems consist of a set of transitions which are non-deterministically chosen and executed. We present a theory of guiding symbolic reachability in such systems by scheduling clusters of transitions. A theory of reachability expressions which specify the schedules is presented. This theory allows proving equivalence of different schedules which may have radically different performance in BDD-based search. We present experimental evidence to show that optimized reachability expressions give rise to significant performance advantages. The profiling is carried out in the NuSMV framework using examples from discrete timed automata and circuits with delays. A variant tool called NuSMV-DP has been developed for interpreting reachability expressions to carry out the experiments.

[1]  Edmund M. Clarke,et al.  Symbolic Model Checking: 10^20 States and Beyond , 1990, Inf. Comput..

[2]  Luciano Lavagno,et al.  Disjunctive partitioning and partial iterative squaring: an effective approach for symbolic traversal of large circuits , 1997, DAC.

[3]  Gianfranco Ciardo,et al.  A Fine-Grained Fullness-Guided Chaining Heuristic for Symbolic Reachability Analysis , 2006, ATVA.

[4]  Helmut Veith,et al.  Nonlinear quantification scheduling in image computation , 2001, IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281).

[5]  Gianfranco Ciardo,et al.  The saturation algorithm for symbolic state-space exploration , 2006, International Journal on Software Tools for Technology Transfer.

[6]  Randal E. Bryant,et al.  Graph-Based Algorithms for Boolean Function Manipulation , 1986, IEEE Transactions on Computers.

[7]  Helmut Veith,et al.  Using Combinatorial Optimization Methods for Quantification Scheduling , 2001, CHARME.

[8]  Marco Pistore,et al.  Nusmv version 2: an opensource tool for symbolic model checking , 2002, CAV 2002.

[9]  R. Brayton,et al.  Reachability analysis using partitioned-ROBDDs , 1997, ICCAD 1997.

[10]  Gianfranco Ciardo,et al.  Saturation-Based Symbolic Reachability Analysis Using Conjunctive and Disjunctive Partitioning , 2005, CHARME.

[11]  Edmund M. Clarke,et al.  Sequential circuit verification using symbolic model checking , 1991, DAC '90.

[12]  Jordi Cortadella,et al.  Verification of Asynchronous Circuits by BDD-based Model Checking of Petri Nets , 1995, Application and Theory of Petri Nets.

[13]  Dirk Beyer,et al.  Rabbit: A Tool for BDD-Based Verification of Real-Time Systems , 2003, CAV.

[14]  Kavita Ravi,et al.  Symbolic guided search for CTL model checking , 2000, Proceedings 37th Design Automation Conference.

[15]  Marco Pistore,et al.  NuSMV 2: An OpenSource Tool for Symbolic Model Checking , 2002, CAV.