Accurate time-variant analysis of a current-reuse 2.2 GHz 1.3 mW CMOS front-end

This paper presents a 2.2 GHz receiver front-end capable of an extreme current reuse, where the low-noise amplifier, the quadrature mixers and VCOs only draw 1.3 mA from a 1V supply. A careful time-variant analysis is carried out, resulting in a very accurate expression of the conversion gain and bandwidth of the downconverter. A prototype, implemented in a 90 nm CMOS technology, shows 27 dB gain over a 14 MHz bandwidth, with a noise figure of 13 dB. The input-referred 1 dB compression point is −23.7 dBm.

[1]  David J. Allstot,et al.  A 7.2mW quadrature GPS receiver in 0.13µm CMOS , 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[2]  Antonio Liscidini,et al.  A 2.4 GHz 3.6mW 0.35mm2 Quadrature Front-End RX for ZigBee and WPAN Applications , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[3]  L. Zadeh,et al.  Frequency Analysis of Variable Networks , 1950, Proceedings of the IRE.

[4]  R. Castello,et al.  Single-Stage Low-Power Quadrature RF Receiver Front-End: The LMV Cell , 2006, IEEE Journal of Solid-State Circuits.

[5]  Pietro Andreani,et al.  Reduced Impact of Induced Gate Noise on Inductively Degenerated LNAs in Deep Submicron CMOS Technologies , 2005 .

[6]  A. Mazzanti,et al.  Class-C Harmonic CMOS VCOs, With a General Result on Phase Noise , 2008, IEEE Journal of Solid-State Circuits.

[7]  T. Strom,et al.  Analysis of periodically switched linear circuits , 1977 .

[8]  R. Castello,et al.  A 0.23mm2 free coil ZigBee receiver based on a bond-wire self-oscillating mixer , 2008, ESSCIRC 2008 - 34th European Solid-State Circuits Conference.

[9]  Pietro Andreani,et al.  More on the Phase Noise Performance of CMOS , 2006 .