The design and implementation of a robust single-layer QCA ALU using a novel fault-tolerant three-input majority gate

Inverter and majority gates are considered as two important primitive gates for designing logical circuits in the quantum-dot cellular automata (QCA) technology. Up to now, many QCA layouts have been introduced for three-input majority gates, most of which are not robust against the QCA defects and so they are prone to faults. In this paper, we propose an efficient fault-tolerant 3-input majority gate with ten simple and rotated cells whose output signal strength is very high (± 9.93e−001). The fault tolerance of the proposed structure is investigated against cell omission, extra-cell deposition, and displacement defects. The results show that the proposed structure is 100% and 90% tolerant against single-cell omission and extra-cell deposition defects. Moreover, the error probability of the proposed gate under cell omission and extra-cell deposition defects is investigated through analytical modeling. Using the proposed fault-tolerant structure, two basic circuits including a fault-tolerant QCA full-adder and a fault-tolerant 2:1 QCA multiplexer are introduced. Finally, using the proposed circuits, a fault-tolerant one-bit arithmetic logic unit with four mathematical and logical operations is designed and implemented. To verify the proposed three-input majority gate, some physical proofs are provided. The results of simulations by QCADesigner 2.0.3 show that the proposed circuits work well. The power analysis of the proposed structure is performed using a QCAPro tool. The comparison results show that the proposed circuits are much better than the previous designs.

[1]  Saeed Rasouli Heikalabad,et al.  Robust QCA full-adders using an efficient fault-tolerant five-input majority gate , 2019, Int. J. Circuit Theory Appl..

[2]  Mohammad Mosleh,et al.  A novel ultra‐dense and low‐power structure for fault‐tolerant three‐input majority gate in QCA technology , 2019, Concurr. Comput. Pract. Exp..

[3]  P. Yupapin,et al.  In-situ 3D micro-sensor model using embedded plasmonic island for biosensors , 2018, Microsystem Technologies.

[4]  Ali Ghaffari,et al.  Designing a new reversible ALU by QCA for reducing occupation area , 2019, The Journal of Supercomputing.

[5]  Ahmad Sharieh,et al.  Solving traveling salesman problem using parallel repetitive nearest neighbor algorithm on OTIS-Hypercube and OTIS-Mesh optoelectronic architectures , 2017, The Journal of Supercomputing.

[6]  Jadav Chandra Das,et al.  Novel design of reversible priority encoder in quantum dot cellular automata based on Toffoli gate and Feynman gate , 2019, The Journal of Supercomputing.

[7]  M. M. Abutaleb Robust and efficient QCA cell-based nanostructures of elementary reversible logic gates , 2018, The Journal of Supercomputing.

[8]  Saeed Rasouli Heikalabad,et al.  An efficient fault-tolerant arithmetic logic unit using a novel fault-tolerant 5-input majority gate in quantum-dot cellular automata , 2020, Comput. Electr. Eng..

[9]  Mehdi Baradaran Tahoori,et al.  Quantum cellular automata: new defects and faults for new devices , 2004, 18th International Parallel and Distributed Processing Symposium, 2004. Proceedings..

[10]  Nima Jafari Navimipour,et al.  Correction to: A new three-level fault tolerance arithmetic and logic unit based on quantum dot cellular automata , 2018 .

[11]  Yongqiang Zhang,et al.  The Fundamental Primitives with Fault-Tolerance in Quantum-Dot Cellular Automata , 2018, J. Electron. Test..

[12]  Bibhash Sen,et al.  On the reliability of majority logic structure in quantum-dot cellular automata , 2016, Microelectron. J..

[13]  Hao Chen,et al.  On the Reliability of Computational Structures Using Majority Logic , 2011, IEEE Transactions on Nanotechnology.

[14]  Mohammad Mosleh,et al.  Efficient designs of reversible latches with low quantum cost , 2019, IET Circuits Devices Syst..

[15]  Nima Jafari Navimipour,et al.  A new three-level fault tolerance arithmetic and logic unit based on quantum dot cellular automata , 2017, Microsystem Technologies.

[16]  Nima Jafari Navimipour,et al.  New Design of a 4-Bit Ripple Carry Adder on a Nano-Scale Quantum-Dot Cellular Automata , 2019 .

[17]  Bibhash Sen,et al.  Design of Testable Adder in Quantum-dot Cellular Automata with Fault Secure Logic , 2017, Microelectron. J..

[18]  Mohammad Mosleh,et al.  A novel design of fault-tolerant RAM cell in quantum-dot cellular automata with physical verification , 2019, The Journal of Supercomputing.

[19]  Mostafa Rahimi Azghadi,et al.  Design and analysis of efficient QCA reversible adders , 2018, The Journal of Supercomputing.

[20]  Debasis Mitra,et al.  Design of a practical fault-tolerant adder in QCA , 2016, Microelectron. J..

[21]  Nima Jafari Navimipour,et al.  Design and evaluation of a new structure for fault-tolerance full-adder based on quantum-dot cellular automata , 2018, Nano Commun. Networks.

[22]  Bibhash Sen,et al.  Realizing Reversible Computing in QCA Framework Resulting in Efficient Design of Testable ALU , 2014, ACM J. Emerg. Technol. Comput. Syst..

[23]  P. D. Tougaw,et al.  A device architecture for computing with quantum dots , 1997, Proc. IEEE.

[24]  Milad Sangsefidi,et al.  Coplanar Full Adder in Quantum-Dot Cellular Automata via Clock-Zone-Based Crossover , 2015, IEEE Transactions on Nanotechnology.

[25]  Ali Newaz Bahar,et al.  Design of an Efficient Multilayer Arithmetic Logic Unit in Quantum-Dot Cellular Automata (QCA) , 2019, IEEE Transactions on Circuits and Systems II: Express Briefs.

[26]  Guangjun Xie,et al.  Design and comparison of new fault-tolerant majority gate based on quantum-dot cellular automata , 2018 .

[27]  Mohammad Mosleh,et al.  New designs of fault-tolerant adders in quantum-dot cellular automata , 2019, Nano Commun. Networks.

[28]  Mohammad Mosleh,et al.  A novel fault-tolerant multiplexer in quantum-dot cellular automata technology , 2018, The Journal of Supercomputing.

[29]  Sumant Katiyal,et al.  Two Bit Arithmetic Logic Unit ( ALU ) in QCA , 2013 .

[30]  Saeed Rasouli Heikalabad,et al.  A revolution in nanostructure designs by proposing a novel QCA full-adder based on optimized 3-input XOR , 2018, Physica B: Condensed Matter.

[31]  He Zhang,et al.  Spintronic Processing Unit Within Voltage-Gated Spin Hall Effect MRAMs , 2019, IEEE Transactions on Nanotechnology.

[32]  Mehdi Baradaran Tahoori,et al.  Defects and faults in quantum cellular automata at nano scale , 2004, 22nd IEEE VLSI Test Symposium, 2004. Proceedings..

[33]  T.J. Dysart,et al.  > Replace This Line with Your Paper Identification Number (double-click Here to Edit) < 1 , 2001 .

[34]  Fei Peng,et al.  Design and analysis of new fault-tolerant majority gate for quantum-dot cellular automata , 2016 .

[35]  Rafael Asenjo,et al.  Correction to: Simultaneous multiprocessing in a software-defined heterogeneous FPGA , 2018, The Journal of Supercomputing.

[36]  Mojtaba Valinataj,et al.  Novel parity-preserving reversible logic array multipliers , 2017, The Journal of Supercomputing.

[37]  Saeed Rasouli Heikalabad,et al.  A novel fault tolerant majority gate in quantum-dot cellular automata to create a revolution in design of fault tolerant nanostructures, with physical verification , 2018 .

[38]  Saket Srivastava,et al.  QCAPro - An error-power estimation tool for QCA circuit design , 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

[39]  Nima Jafari Navimipour,et al.  Designing an efficient fault tolerance D-latch based on quantum-dot cellular automata nanotechnology , 2019, Optik.

[40]  Wei Wang,et al.  Quantum-dot cellular automata adders , 2003, 2003 Third IEEE Conference on Nanotechnology, 2003. IEEE-NANO 2003..

[41]  H. V. Jayashree,et al.  Ancilla-input and garbage-output optimized design of a reversible quantum integer multiplier , 2016, The Journal of Supercomputing.

[42]  Jing Huang,et al.  On the Tolerance to Manufacturing Defects in Molecular QCA Tiles for Processing-by-wire , 2007, J. Electron. Test..

[43]  Keivan Navi,et al.  Novel efficient full adder and full subtractor designs in quantum cellular automata , 2019, The Journal of Supercomputing.

[44]  Razieh Farazkish,et al.  Novel efficient fault-tolerant full-adder for quantum-dot cellular automata , 2018 .

[45]  Saeed Rasouli Heikalabad,et al.  A full adder structure without cross-wiring in quantum-dot cellular automata with energy dissipation analysis , 2018, The Journal of Supercomputing.

[46]  Alexander Yu. Vlasov,et al.  On Quantum Cellular Automata , 2004, ArXiv.

[47]  S. Polisetti,et al.  QCA based multiplexing of 16 arithmetic & logical subsystems-A paradigm for nano computing , 2008, 2008 3rd IEEE International Conference on Nano/Micro Engineered and Molecular Systems.

[48]  Nima Jafari Navimipour,et al.  An optimized design of full adder based on nanoscale quantum-dot cellular automata , 2018 .

[49]  Mohammad Mosleh,et al.  Parity-preserving reversible flip-flops with low quantum cost in nanoscale , 2019, The Journal of Supercomputing.

[50]  Lei Wang,et al.  Novel designs of full adder in quantum-dot cellular automata technology , 2018, The Journal of Supercomputing.

[51]  Nima Jafari Navimipour,et al.  Design of a loop-based random access memory based on the nanoscale quantum dot cellular automata , 2018, Photonic Network Communications.

[52]  N. Ranganathan,et al.  Reversible logic based multiplication computing unit using binary tree data structure , 2015, The Journal of Supercomputing.

[53]  Mozammel H. A. Khan,et al.  Automatic synthesis of quaternary quantum circuits , 2017, The Journal of Supercomputing.

[54]  Wolfgang Porod,et al.  Quantum cellular automata , 1994 .

[55]  Nima Jafari Navimipour,et al.  Designing a 2-to-4 decoder on nanoscale based on quantum-dot cellular automata for energy dissipation improving , 2018 .

[56]  Nima Jafari Navimipour,et al.  An Optimized Three-Level Design of Decoder Based on Nanoscale Quantum-Dot Cellular Automata , 2018 .