Fault Detection and Design For Testability of CMOS Logic Circuits

Advances in integrated circuit technologies have made complementary MOS (CMOS) the preferred MOS technology for digital logic circuits. Cost effective design and fabrication of reliable CMOS VLSI chips require understanding of various CMOS technologies, logic families, failure modes, fault detection methods and design for testability methods. In this paper we will review some of the basic methods and issues related to the design and fault detection of CMOS logic circuits.

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